The present invention relates to the field of semiconductor manufacturing. More particularly, the present invention provides methods of obtaining conductive rugged silicon.
Electrically conductive rugged silicon surfaces are useful in the manufacturing of dynamic semiconductor storage devices requiring storage node capacitor cell plates large enough to maintain adequate charge, i.e., capacitance, in the face of parasitic capacitances and noise that may be present during operation of a circuit including the storage devices. Maintaining storage node capacitance is especially important due to the continuing increases in Dynamic Random Access Memory (DRAM) array density.
Such DRAM devices, among others, rely on capacitance stored between two conductors separated by a layer of dielectric material. One method of increasing the capacitance of a capacitor formed using conductive polysilicon layers is to increase the surface area of the conductors. Using conductive rugged silicon for the first conductor is one method of increasing the surface area of the conductors because the later-deposited dielectric layer and second conductor will typically conform to the surface of the first deposited conductor.
Hemispherical grain silicon (commonly referred to as HSG silicon) is one example of a silicon layer with a rugged surface, i.e., a surface that is not smooth. Hemispherical grain silicon can be obtained by a number of methods including Low Pressure Chemical Vapor Deposition (LPCVD) at conditions resulting in a layer of roughened polysilicon. Another method includes depositing a layer of amorphous silicon, followed by high temperature seeding and annealing to cause the formation of HSG silicon.
The silicon layers to be converted into HSG silicon or deposited as HSG silicon are not, however, typically in situ doped during deposition because in situ doping of the amorphous silicon can result in crystallites within the amorphous silicon layer. As a result, additional steps, such as seeding and/or annealing are required to reliably transform the in situ doped, generally amorphous silicon into rugged hemispherical grain silicon. Those additional steps increase cost and decrease throughput.
The present invention provides methods of forming in situ conductively doped rugged silicon. In one aspect, the present invention provides a method including steps of forming a layer of doped amorphous silicon on a substrate at a substantially constant deposition temperature; and converting the amorphous silicon layer into hemispherical grain silicon by annealing the amorphous silicon layer at substantially the deposition temperature while varying pressure.
In another aspect, the present invention provides a method of forming hemispherical grain silicon including steps of forming a layer of doped amorphous silicon on a substrate at a substantially constant deposition temperature of about 565 to about 575xc2x0 C.; and converting the amorphous silicon layer into hemispherical grain silicon by annealing the amorphous silicon layer at substantially the deposition temperature while varying pressure.
In another aspect, the present invention provides a method of forming hemispherical grain silicon including steps of forming a layer of in situ doped amorphous silicon on a substrate at a substantially constant deposition temperature; forming a layer of undoped amorphous silicon on the doped amorphous silicon layer at the deposition temperature; and converting the doped and undoped amorphous silicon layers into hemispherical grain silicon by annealing the silicon layers at substantially the deposition temperature while varying pressure.
In another aspect, the present invention provides a method of forming hemispherical grain silicon including steps of forming a layer of doped amorphous silicon on a substrate at a substantially constant deposition temperature of about 565 to about 575xc2x0 C.; forming a layer of undoped amorphous silicon on the doped amorphous silicon layer at the deposition temperature; and converting the doped and undoped amorphous silicon layers into hemispherical grain silicon by annealing the silicon layers at substantially the deposition temperature while varying pressure.
In another aspect, the present invention provides a method of forming hemispherical grain silicon including steps of forming a discontinuous first layer of doped silicon on a substrate; forming a second layer of amorphous silicon on the first layer of doped silicon and the substrate not covered by the first layer of doped silicon; and annealing the first and second layers.
In another aspect, the present invention provides a method of forming hemispherical grain silicon including steps of forming a discontinuous first layer of doped silicon on a substrate at a deposition temperature of about 600xc2x0 C. or greater, the first layer having a concentration of dopant of about 1020 atoms/cm3 or greater; forming a second layer of amorphous silicon on the first layer of doped silicon and the substrate not covered by the first layer of doped silicon; and annealing the first and second layers.
In another aspect, the present invention provides a method of forming hemispherical grain silicon including steps of forming a discontinuous first layer of doped silicon on a substrate; removing a portion of the first layer of doped silicon from the substrate; forming a second layer of amorphous silicon on the first layer of doped silicon and the substrate not covered by the first layer of doped silicon; and annealing the first layer of doped silicon and the second layer of amorphous silicon to form hemispherical grain silicon.
In another aspect, the present invention provides a method of forming hemispherical grain silicon including steps of forming a discontinuous first layer of doped silicon on a substrate at a temperature of about 600xc2x0 C. or above, wherein the concentration of dopant in the first layer of doped silicon is about 1020 atoms/cm3 or greater; removing a portion of the first layer of doped silicon from the substrate; forming a second layer of doped amorphous silicon on the first layer of doped silicon and the substrate not covered by the first layer of doped silicon; and annealing the first layer of doped silicon and the second layer of doped amorphous silicon to form hemispherical grain silicon.
These and other features and advantages of methods according to the present invention are described in the detailed description of the invention below.